{"id":3851,"date":"2026-03-10T13:13:45","date_gmt":"2026-03-10T11:13:45","guid":{"rendered":"https:\/\/catedrachip.upc.edu\/training\/"},"modified":"2026-04-21T11:01:26","modified_gmt":"2026-04-21T09:01:26","slug":"training","status":"publish","type":"page","link":"https:\/\/catedrachip.upc.edu\/en\/training\/","title":{"rendered":"Training"},"content":{"rendered":"\n
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Training <\/h2>\n\n\n\n

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Ongoing investigations<\/h2>\n\n
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Automation Methodologies for the Systematic Design of Integrated Analog Blocks<\/h4>\n\n
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V\u00edctor Torres Collantes<\/p>\n \n

Investigador\/a de Suport a la Recerca<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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Design and simulation of biologically inspired hardware-based neurons and neural networks<\/h4>\n\n
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D\u00eddac Llobet Mu\u00f1oz<\/p>\n \n

Investigador\/a de Suport a la Recerca<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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Development of an Adaptive Neuromorphic Processor with Sensor Integration and Scalable SNN Architecture<\/h4>\n\n
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Arnau Larre Alos<\/p>\n \n

Investigador\/a de Suport a la Recerca<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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Implementing a 65nm RTL-to-GDSII SoC design flow<\/h4>\n\n
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A.Joshua Castro Sisniegas<\/p>\n \n

Investigador\/a de Suport a la Recerca<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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Simulation and Automated Evaluation of Digital Circuits<\/h4>\n\n
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Miquel Torner Vi\u00f1als<\/p>\n \n

Investigador\/a de Suport a la Recerca<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n <\/div>\n <\/section>\n\n\n\n

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Sidecar Project<\/p>\n\n\n\n

Awakening scientific and technological vocations in schools and institutes<\/h2>\n<\/div>\n<\/div>\n\n\n\n\n<\/path>\n<\/svg>\n<\/div><\/div>\n<\/div>\n\n\n\n
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Latest news<\/p>\n\n\n\n

Read the latest research news and our activities<\/h2>\n<\/div>\n<\/div>\n\n\n\n\n<\/path>\n<\/svg>\n<\/div><\/div>\n<\/div>\n<\/div>\n","protected":false},"excerpt":{"rendered":"

Ongoing investigations<\/p>\n","protected":false},"author":2,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-3851","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/catedrachip.upc.edu\/en\/wp-json\/wp\/v2\/pages\/3851","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/catedrachip.upc.edu\/en\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/catedrachip.upc.edu\/en\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/catedrachip.upc.edu\/en\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/catedrachip.upc.edu\/en\/wp-json\/wp\/v2\/comments?post=3851"}],"version-history":[{"count":2,"href":"https:\/\/catedrachip.upc.edu\/en\/wp-json\/wp\/v2\/pages\/3851\/revisions"}],"predecessor-version":[{"id":3853,"href":"https:\/\/catedrachip.upc.edu\/en\/wp-json\/wp\/v2\/pages\/3851\/revisions\/3853"}],"wp:attachment":[{"href":"https:\/\/catedrachip.upc.edu\/en\/wp-json\/wp\/v2\/media?parent=3851"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}