{"id":3875,"date":"2026-03-10T13:13:45","date_gmt":"2026-03-10T11:13:45","guid":{"rendered":"https:\/\/catedrachip.upc.edu\/applications-and-automatic-design\/"},"modified":"2026-04-21T11:01:36","modified_gmt":"2026-04-21T09:01:36","slug":"applications-and-automatic-design","status":"publish","type":"page","link":"https:\/\/catedrachip.upc.edu\/en\/applications-and-automatic-design\/","title":{"rendered":"Applications and automatic design"},"content":{"rendered":"\n
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Scope of applications and automatic design<\/h2>\n\n\n\n

Research and develop training and solutions around the semiconductor ecosystem focusing on applications and design automation with the study of new architectures and circuits for serial communications and optimization of physical planning, placement and routing of circuits using efficient algorithmic techniques in highly complex systems.<\/p>\n<\/div>\n<\/div>\n<\/div><\/div>\n\n

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Ongoing investigations<\/h2>\n\n
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Design and implementation of power management circuits for quantum dot-based image sensor characterization systems<\/h4>\n\n
\n \"Alen\n <\/figure>\n \n\n

Alen Garalyan<\/p>\n \n

Research Support Investigator<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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\"\"\n <\/figure>\n \n

Design of Chip-Level Digital Subsystems for a Hybrid-Stacked Image Sensor<\/h4>\n\n
\n \"Andreu\n <\/figure>\n \n\n

Andreu Llompart Roca<\/p>\n \n

Research Support Investigator<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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\"\"\n <\/figure>\n \n

Design of Chip-Level Digital Subsystems for Hybrid Stacked Image Sensors<\/h4>\n\n
\n \"N\u00e9stor\n <\/figure>\n \n\n

N\u00e9stor Tuneu Arroyo<\/p>\n \n

Research Support Investigator<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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Development of an Interactive Graphical Tool for Optimization and Editing of Floorplanning in Chip Design<\/h4>\n\n
\n \"Nuria\n <\/figure>\n \n\n

Nuria Elizondo Cereza<\/p>\n \n

Research Support Investigator<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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\"\"\n <\/figure>\n \n

Development of Mathematical and Heuristic Optimization Tools for Chip Floorplanning<\/h4>\n\n
\n \"Guillem\n <\/figure>\n \n\n

Guillem Pastor Ru\u00e9<\/p>\n \n

Research Support Investigator<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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\"\"\n <\/figure>\n \n

FPGA-based systems for multi-sensor cameras<\/h4>\n\n
\n \"Judit\n <\/figure>\n \n\n

Judit Ubach Bad\u00eda<\/p>\n \n

Research Support Investigator<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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\"\"\n <\/figure>\n \n

Hierarchical floorplanning optimization algorithms for System-on-Chip architectures<\/h4>\n\n
\n \"Bernat\n <\/figure>\n \n\n

Bernat Iba\u00f1ez<\/p>\n \n

Research Support Investigator<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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High Predictability Global Routing during Floorplanning of Complex Chips<\/h4>\n\n
\n \"Antoni\n <\/figure>\n \n\n

Antoni Pech Alberich<\/p>\n \n

Research Support Investigator<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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High-speed serial data transmission circuit for image sensors<\/h4>\n\n
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Enrique Barajas Ojeda<\/p>\n \n

Research Support Investigator<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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\"\"\n <\/figure>\n \n

High-speed serial data transmission circuit for image sensors<\/h4>\n\n
\n \"Alberto\n <\/figure>\n \n\n

Alberto L\u00f3pez Gass\u00f3<\/p>\n \n

Research Support Investigator<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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\"\"\n <\/figure>\n \n

Mathematical Optimization Techniques for Hierarchical Floorplanning of Complex Chips<\/h4>\n\n
\n \"Yilihamujiang\n <\/figure>\n \n\n

Yilihamujiang Yimamu<\/p>\n \n

Predoctoral Researcher<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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\"\"\n <\/figure>\n \n

Optimization of Training Distributed AI Workloads on Multi-node Computing Systems<\/h4>\n\n
\n \"Mohammad\n <\/figure>\n \n\n

Mohammad Nasser<\/p>\n \n

Predoctoral Researcher<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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\"\"\n <\/figure>\n \n

Optimization of Training Distributed AI Workloads on Multi-node Computing Systems.<\/h4>\n\n
\n \"Xavier\n <\/figure>\n \n\n

Xavier Querol Bassols<\/p>\n \n

Research Support Investigator<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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Optimizing distributed AI workload training on multinode computing systems<\/h4>\n\n
\n \"Sergi\n <\/figure>\n \n\n

Sergi Tom\u00e0s Mart\u00ednez<\/p>\n \n

Research Support Investigator<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n\n
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\"\"\n <\/figure>\n \n

Simulation-Based Recommendation Framework for Scalable Training of Distributed AI<\/h4>\n\n
\n \"Tom\u00e0s\n <\/figure>\n \n\n

Tom\u00e0s Gadea Alcaide<\/p>\n \n

Research Support Investigator<\/p>\n \n \n <\/path>\n <\/svg>\n\n <\/a>\n \n \n <\/div>\n <\/section>\n\n\n\n

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Sidecar Project<\/p>\n\n\n\n

Awakening scientific and technological vocations in schools and institutes<\/h2>\n<\/div>\n<\/div>\n\n\n\n\n<\/path>\n<\/svg>\n<\/div><\/div>\n<\/div>\n\n\n\n
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Latest news<\/p>\n\n\n\n

Read the latest research news and our activities<\/h2>\n<\/div>\n<\/div>\n\n\n\n\n<\/path>\n<\/svg>\n<\/div><\/div>\n<\/div>\n<\/div>\n","protected":false},"excerpt":{"rendered":"

Ongoing investigations<\/p>\n","protected":false},"author":2,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-3875","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/catedrachip.upc.edu\/en\/wp-json\/wp\/v2\/pages\/3875","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/catedrachip.upc.edu\/en\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/catedrachip.upc.edu\/en\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/catedrachip.upc.edu\/en\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/catedrachip.upc.edu\/en\/wp-json\/wp\/v2\/comments?post=3875"}],"version-history":[{"count":1,"href":"https:\/\/catedrachip.upc.edu\/en\/wp-json\/wp\/v2\/pages\/3875\/revisions"}],"predecessor-version":[{"id":3885,"href":"https:\/\/catedrachip.upc.edu\/en\/wp-json\/wp\/v2\/pages\/3875\/revisions\/3885"}],"wp:attachment":[{"href":"https:\/\/catedrachip.upc.edu\/en\/wp-json\/wp\/v2\/media?parent=3875"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}