Logic gates with paper

Manual construction, with paper, of logic gates to understand the internal workings of digital circuits.

This activity offers a tangible and creative introduction to logic circuits through the manual construction of NOT, NOR and NAND gates. Students make functional models of NMOS and PMOS transistors using simple materials such as paper, scissors and conductive strips. From these elements, they assemble different logic gates and analyze their operation. The verification of the truth tables is carried out directly through the visualization with an LED. The activity allows to demystify the internal workings of digital circuits. It promotes the understanding of the concepts of switching and binary logic. It connects abstract theory with a manipulative and accessible experience. It also encourages cooperative work, technological curiosity and computational thinking. It is especially suitable for awakening scientific and technological vocations in pre-university stages.

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