Heterogeneous infrastructure with cache coherence for rapid prototyping of hardware accelerators for bioinformatics

Heterogeneous infrastructure with cache coherence for rapid prototyping of hardware accelerators for bioinformatics

Description

This project focuses on the development of a reusable accelerator testbed based on the Xilinx Kria MPSoC-FPGA platform. The infrastructure enables direct deployment of domain-specific accelerators (DSA) on the FPGA fabric, offering significantly faster execution speeds than traditional simulation. A central feature is the cache-coherent connection of the accelerators to the ARM processor's last-level cache (LLC), ensuring efficient, low-latency data exchange between the processor and the accelerator. By supporting full-stack applications on a standard Linux operating system, this testbed provides end-to-end performance insights that closely approximate the conditions of a final ASIC product, bridging the gap between hardware prototyping and real-world deployment in genomics and bioinformatics.

Background

Eric is currently in the final year of his Bachelor's degree in Computer Engineering, specializing in Computer Architecture, at the Universitat Autònoma de Barcelona (UAB). His studies focus on computer architecture, digital design, and systems integration. While completing his degree, he has already gained practical experience in FPGA prototyping and heterogeneous accelerator design, applying his academic training to research in real-world high-performance computing.

Motivation

Testing domain-specific accelerators (DSAs) in simulation is slow and often provides limited insight into end-to-end application performance. Either accuracy is sacrificed for speed, or results take too long to arrive. Eric is motivated by the opportunity to close this gap by providing a cache-coherent FPGA-based prototyping infrastructure that provides fast and accurate performance evaluation. This project addresses a clear need in the accelerator design community and supports the rapid development of bioinformatics hardware that can efficiently move from prototype to deployment. Eric's research interests include FPGA prototyping, cache-coherent accelerators, hardware/software co-design, and performance evaluation of domain-specific accelerators for bioinformatics.

Research Support Investigator

Eric Santigosa

Eric Santigosa

Bachelor's degree student in Computer Engineering

Host Organization

Supervisors

Santiago Marco-Sola

Santiago Marco-Sola

UPC supervisor

The content of this website reflects only the views of the Catedra Chip Chair UPC project.

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