FPGA-based systems for multi-sensor cameras

Description

The objective of this project is the architectural redesign and implementation of a high-performance FPGA-based system adapted for image sensors. The main challenge is to scale the existing logic to support increased data throughput and the integration of multiple sensors in the same system. By using FPGA technology and its parallel processing capabilities, the project seeks to manage high-speed data streams, ensuring precise synchronization and efficient data packaging for subsequent processing.

Background

Judit is an undergraduate student currently pursuing a degree in Electronic Telecommunications Engineering (GREELEC) at the Polytechnic University of Catalonia (UPC). Judit has chosen this research project at the company IMASENIC due to her motivation for the design of complex digital systems. This collaboration allows her to apply her academic knowledge in an industrial R&D environment, focusing on the optimization of the digital infrastructure for state-of-the-art multi-sensor cameras.